The Bare (Board) Truth: Hey, They’re Just Vias—or Are They?

From its traditional use to more unconventional uses, the via has gone through some changes over the years. In this month’s column, I will examine issues such as:

  • Expressing tolerances for vias
  • Blind and buried vias
  • When, where, and why you should fill vias
  • Via-in-pad
  • Stacked vias
  • Vias for thermal applications

Expressing Via Tolerances on a Drill Drawing

I get this phone call at least once a week: “Hey, Mark, what is the smallest mechanical via that can be done by your company?”

This is followed on my end by, “What will the tolerance for the vias in question be?”

If they say, “Oh, your standard +/-.003” tolerances,” I am obligated to tell them the min via would be around .0078” with a signal pad of at least .014” and an anti-pad of at least .018”. Usually, at this point I hear a lot of choking and coughing and they say, “But I am egressing from a .4mm pitch BGA, I don’t have that kind of room!”

This is where we talk tolerance. If they are true vias where the finished size is NOT of any consequence, we say, “Why not call them out as +.003” minus the entire hole size?”

At that point I tell them that we can drill smaller and require less signal pad and anti-pad size, which opens the customer up for some routing for these fine-pitch parts. While we are at it, let’s talk about pitch. Many times, we are approached by customers talking about a specific pitch between mounts or pads, such as .4mm or .5mm pitch. Understand that without a design to see the via image data, it is difficult for a fabricator to properly understand what pitch means to the customer.

The pitch is the distance from the center of a given entity to the center of an adjacent entity. This can mean different things based on pad/mount size. Let me give you an SMT pad as an example:

A .5mm pitch means .0197” between the centers of two BGA pads or surface mounts. This seems like a very reasonable distance, given today’s circuit board geometries. However, what if the designed surface mount pad width is .015” wide? This would mean a .5mm pitch would leave only .0047” edge to edge between the mounts. This gives you little or no room to route a trace between mounts at that width and pitch.

Clearly as the pitch between parts decreases based on today’s shrinking chip footprints, the associated surface mount or BGA pad widths need to decrease as well to be able to route even a .003” or .004” trace between them. 

To read this entire article, which appeared in the November 2016 issue of The PCB Design Magazine, click here.

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2016

The Bare (Board) Truth: Hey, They’re Just Vias—or Are They?

11-28-2016

I get this phone call once a week: “Mark, what is the smallest mechanical via that can be done by your company?” I reply, “What will the tolerance for the vias in question be?” If they say, “Oh, your standard +/-.003” tolerances,” I must tell them the min via would be around .0078” with a signal pad of at least .014” and an anti-pad of at least .018”. What if they don't have that kind of room?

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The Top 10 Ways Designers Can Increase Profits

04-19-2016

Can you truly increase profitability through PCB design practices? Mark Thompson believes you can. And it starts with a philosophy that embraces DFM techniques. Then you must be ready for the initial release to a fabricator by ensuring that you are communicating all of your specifications and needs clearly to the fabrication house so that you get an accurate quote. Let’s dive in, starting with Number 10 and working our way to the most important way a designer can increase company profits.

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2015

The Do’s and Don’ts of Signal Routing for Controlled Impedance

06-10-2015

In this column, we will once again be focusing on controlled impedance structures, both from the layout side and the simulation side. I will break them down into the sub-categories of the models they represent and the important points to remember when using the various models. I will also be asking questions such as, “Why would a fabricator ask for a larger impedance tolerance?” and “Where does the fabricator draw the line for controlling various structures?”

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The Bare (Board) Truth: Tips for Getting the Boards You Need

05-22-2015

This column is about meeting each customer's needs. Some customers' requirements are as simple as a specific definition for a fiducial size, rail tooling, or orientation feature, while other customers may require special processes. Mark Thompson offers fabricator tips that can help designers get the boards they need.

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What Will 2015 Bring?

02-25-2015

I’ve been thinking over what 2015 might look like, from my point of view at a PCB fabrication company. Let me first start out with some broad overviews of trends from 2014 that I see continuing. On my end, I certainly expect to see more RF work, more hybrid analog-digital PCBs, and more surface finishes for lead-free assemblies. And that’s just the tip of the iceberg.

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2014

Understanding the Typical CAM Process

03-19-2014

Not all board fabricators have the ability to have both CAD and CAM. You may say to yourself, "But a CAM tool should be able to do some, if not all, CAD functions," and that is true; but if you are really getting to the design level, you need to have a design team.

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The Bare (Board) Truth: Understanding the Typical CAM Process

03-19-2014

Not all board fabricators have the ability to have both CAD and CAM. You may say to yourself, "But a CAM tool should be able to do some, if not all, CAD functions," and that is true; but if you are really getting to the design level, you need to have a design team.

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2013

Qualifying Your Fabricator: Identifying Winners (and Losers)

12-24-2013

Columnist Mark Thompson writes, "Based on today's board complexities, a review should be done prior to quote to make sure no manufacturing issues occur. This is critical when it comes to things like minimum pre-preg interfaces on high-copper coil boards or jobs with unique reference planes for various impedance scenarios."

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The Bare (Board) Truth: Qualifying Your Fabricator - Identifying Winners (and Losers)

12-24-2013

Columnist Mark Thompson writes, "Based on today's board complexities, a review should be done prior to quote to make sure no manufacturing issues occur. This is critical when it comes to things like minimum pre-preg interfaces on high-copper coil boards or jobs with unique reference planes for various impedance scenarios."

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A PCB Design Potpourri

10-16-2013

In this column, Mark Thompson revisits topics covered in some of his previous columns and fleshes them out with new, updated information. Thompson says, "In this job, I truly learn something every day, and I'm happy to share a few notable nuggets with you."

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2012

The Bare (Board) Truth: I'm From CAM and I'm Here to Help

12-12-2012

In this column, Mark Thompson shows that fabricators are not necessarily meddling in your design; some of them really do want to help make your board right the first time. And he also demonstrates how patience and perseverance can go a long way with a customer!

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The Bare (Board) Truth: Tales From the Fab Shop

05-16-2012

Designers continue to create the same-net spacing violations when relying on autorouters. Surface features connected elsewhere on an internal plane may have copper pour too close to other metal features. Electrically it doesn't matter whether these features bridge, but for most fabricators, any sliver thinner than 0.003" has the potential to flake off and redeposit elsewhere. By Mark Thompson.

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Design to Fab: Making it Work

03-30-2012

A very large customer sent us two 4-layer boards riddled with differential pairs, with no information about any controlled impedances or specific dielectrics. When we asked if these were to be controlled, the customer was most appreciative and realized that some mention of the impedances, threshold and tolerance should have been made initially. When in doubt, talk to the customer!

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Mark Thompson: IPC APEX EXPO Wrap-Up

03-07-2012

It was a mostly sunny week in San Diego, where IPC APEX EXPO returned after a long absence. I thought the San Diego Convention Center was a great choice for a venue. And this year, the engineers and designers on the show floor were looking at new processes and technologies like kids in a candy store.

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2011

The Bare (Board) Truth: Slow Down and do it Right

09-21-2011

You may be tempted to cut corners in an effort to stay on schedule. But cutting corners to save time does not save anything if it results in a new rev. Let's talk about the risks associated with assuming your board house will find and be able to correct errors in your designs. You'll avoid most of these if you slow down and do it right!

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The Bare (Board) Truth: Four Common Fabrication Questions

08-03-2011

A few months ago, I covered the "10 Most Common Fab Misconceptions." In this column, I will take a similar approach and address four of the most common fabrication questions that I hear. These same questions keep popping up, over and over. But I believe I can dispel the myths surrounding these challenges, and explain their solutions.

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The Bare (Board) Truth: Scene and Heard at IPC APEX EXPO

06-01-2011

I'm always amazed at the diversity of people I see while people-watching in Vegas. And this year, we saw a great diversity of new products and processes at APEX. Some were new combinations of older technologies, while others addressed problems in a completely new, different way.

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2010

The Bare (Board) Truth: Netlist Mismatches Redux

12-01-2010

Let's start by clarifying the intent of the netlist compare. I still get requests to just "generate a netlist" based on the customer's Gerbers. As I have said, since the intent of a netlist compare is to compare the design criteria against the exported Gerber files, this would never find a mismatch.

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RoHS for Fabricators and Designers: Fact and Fiction

11-03-2010

Most of you have heard of the European Union's RoHS directive. Some people mistakenly think it's mainly an assembly problem. But how, exactly, does RoHS pertain to PCB fabricators and designers? Is RoHS-compliant the same as RoHS-compatible?

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Timing is Everything in Controlled Impedance Fabrication

07-20-2010

According to Mark Thompson, timing can make or break your controlled impedance board. With many jobs going through turnkey environments, late communication about impedance issues takes valuable time out of the fabrication process and can delay delivery of product, leaving the end-user and the turnkey assembler unhappy.

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The Bare (Board) Truth: How to Qualify Your Fabricator

06-16-2010

This column is written from the viewpoint of you, the customer. What should you look for when qualifying a fabricator? Sure, you want the company to be IPC Class 3 6012 capable and ISO-certified, and you may need them to be ITAR-certified as well. But what other criteria can help you separate the wheat from the chaff, so to speak?

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Impedance Lines: Keep Them on the Inside

03-02-2010

Keeping those impedance-controlled lines on the inside layers of a circuit board is a great idea for a number of reasons. Let's start with the facts: You'll make your fabricator and your customer very happy by remembering to keep them on the inside.

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2009

More CAM Edits Revealed!

11-24-2009

A typical CAM department makes numerous edits prior to fabrication. Today, I will elaborate on inner-layer feature CAM edits, including the addition of flow and starburst patterns and constraints for scored jobs, as well as the process for fabricating edge-plated features.

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The Bare (Board) Truth: What Happens to Your CAM Files?

07-22-2009

What does the CAM department do to your files and what does that mean to you? The following is a brief synopsis of the edits that are likely to be performed at CAM prior to fabrication.

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The Bare (Board) Truth: Basic Impedance Fab Guidelines, Part 1

06-10-2009

When we talk about signal integrity or impedance lines, there are some very basic guidelines to follow. Remember, impedance mismatches cause signal reflections, which reduce voltage and timing margins.

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