Beyond Design: A Review of HyperLynx DRC

There is an old saying, “You get what you pay for.” Does this mean that you should not expect too much from free software? After all, free software usually comes at a price: the results might be inaccurate, the software might be time-consuming to set up and use, and the tool might overlook issues that require a revision to mitigate.

But HyperLynx DRC is the exception to the rule. In this month’s column, I will review Mentor’s new HyperLynx DRC Free Edition, which provides analysis tools that complement any PCB layout tool that can export ODB++ or IPC-2581B formats.

Amazingly enough, this software is free. You’ll need to confirm registration annually, but that is not a problem; the tool remains free. There is also a more comprehensive, affordably priced Gold Edition.

HyperLynx DRC is an electrical design rule checking (DRC) tool that can automate the verification of complex digital design rules that are not easily detected, such as rules for traces crossing split planes and electromagnetic compliance (EMC). It does not require expert knowledge and can literally save hours of manual inspection. The tool helps one avoid costly errors and oversights, directing the novice high-speed PCB designer to the source of signal integrity (SI), power integrity (PI) and EMC issues.

Even experienced designers make mistakes and overlook small issues that can become major headaches further down the design, assembly, test or production processes. This is particularly true with complex, high-speed designs that have multiple planes and return paths, requiring elaborate constraints on every class of technology. Sure, we can enter hundreds of rules to constrain copper pours, placement and routing, but there is always some manual adjustment that needs to be made as each design is different and has specific requirements. Online DRCs in EDA tools are a great safeguard, but they do slow the design process somewhat. They warn you when a physical or electrical rule is violated and allow the designer to steer clear of common obstacles.

Although the complete list of design rules is very broad, one must manage the following constraints at a minimum:

  • Placement
  • Clearance
  • Routing
  • High-speed signals–impedance and differential pairs
  • Plane and copper pours
  • Test points (if required)
  • Manufacturing

Impedance discontinuities and crosstalk can be controlled to some extent by PCB designers during the routing phase if they understand these concepts, which many, unfortunately, do not. Although pre-layout analysis detects issues before they occur, signal integrity, power integrity and EMC issues cannot be properly evaluated until the design has been completed and a post-layout analysis is implemented.

To read this entire column, which appeared in the April 2018 issue of Design007 Magazine, click here.

Back

2018

Beyond Design: A Review of HyperLynx DRC

05-23-2018

There is an old saying, “You get what you pay for.” Does this mean that you should not expect too much from free software? After all, free software usually comes at a price: the results might be inaccurate, the software might be time-consuming to set up and use, and the tool might overlook issues that require a revision to mitigate. But HyperLynx DRC is the exception to the rule.

View Story

Beyond Design: AC/DC is Not Just a Rock Band

04-27-2018

Positioned at our usual table at the local pub in Melbourne, Australia one night in 1972, the boys and I laughed as a school boy, guitarist Angus Young, set up equipment and tuned a guitar. We assumed he was one of the roadies, and were gobsmacked when AC/DC unexpectedly fired up. This month, I will discuss AC coupling (or is it DC blocking?) of high-speed serial links as my taste in music has matured over the years.

View Story

The Target Impedance Approach to PDN Design

03-13-2018

Before you worry (or not) about post-layout PDN DC drop analysis, you first need to design an effective PDN pre-layout. Smart designers prevent problems before they arise, while others waste time and resources trying to fix the mess that they inadvertently created due to their lack of due diligence. Engineers and PCB designers need to visualize and understand how and where the currents flow.

View Story

Beyond Design: Ground Bounce

02-22-2018

Ground bounce, or more precisely, supply bounce, is the voltage produced between two points in the power delivery path. It is fundamentally related to the total inductance of the current path and shared return paths and the instantaneous surge current delivered by the power supply. Once again, we find that inductance is the covert enemy of the high-speed PCB designer. It is the primary cause of simultaneous switching noise and electromagnetic radiation. As edge rates continue to increase, the impact of intrinsic electrical characteristics become more pronounced. In this month’s column, Barry Olney looks at supply bounce and how to minimise the impact on high-speed digital circuits.

View Story

Beyond Design: Signal Flight Time Variance in Multilayer PCBs

01-24-2018

A transmission line does not carry the digital signal itself but rather, guides electromagnetic energy from one point to another. Signals travel at the same speed, given the same medium. However, the microstrip (outer layer) traces are embedded in a mélange of dielectric material, solder mask, and air. This lowers the effective dielectric constant and increases the propagation speed compared to that of stripline (inner layer) traces. This month, Barry Olney looks at the disparity in signal propagation in multilayer PCBs.

View Story

Beyond Design: Next-Gen PCBs—Substrate Integrated Waveguides

01-05-2018

As PCB transmission frequencies head toward 100GHz, copper interconnect is reaching its performance threshold. Ultimately, it is dielectric loss, copper roughness, and data transfer capacity that are the culprits. However, the biggest performance restriction for PCB interconnects is the size of the conductor. Metallic waveguides, on the other hand, are a better option than traditional transmission lines, but they are bulky, expensive and non-planar in nature. However, recently, substrate integrated waveguides (SIW) structures have emerged as a viable alternative.

View Story
Back

2017

Beyond Design: When Do Traces Become Transmission Lines?

12-06-2017

At low frequencies, traces and components on a PCB behave simply as lossless lumped elements—as taught in Circuit Theory 101. But as the frequency increases, the copper trace and adjacent dielectric(s) become a transmission line, the skin effect forces current into the outer regions of the conductor and frequency dependant losses impact on the quality of the signal. The PCB trace now behaves as a distributed system with parasitic inductance and capacitance characterized by delay and scattered reflections. The behavior we are now concerned about occurs in the frequency domain rather than the familiar time domain. This is the real world of high-speed design.

View Story

Beyond Design: Plane Cavity Resonance

10-31-2017

Plane pairs in multilayer PCBs are essentially unterminated transmission lines—just not the usual traces or cables we may be accustomed to. They also provide a very low-impedance path, which means that they can present logic devices with a stable reference voltage at high frequencies. But as with signal traces, if the transmission line is mismatched or unterminated, there will be standing waves: ringing. The bigger the mismatch, the bigger the standing waves and the more the impedance will be location dependent.

View Story

Beyond Design: When Legacy Products No Longer Perform

09-12-2017

As IC die sizes continue to compact due to demand for smaller and faster technology, and as switching speeds continue to improve, rise and fall times are creeping down into the sub-nanosecond realm, a territory previously reserved for microwave engineers. It is a common quandary that established products that have worked flawlessly for years suddenly stop performing reliably, due to a new batch of ICs that is used in the latest production run.

View Story

Beyond Design: Transmission Line Losses

08-23-2017

In an ideal world, the entire signal waveform would uniformly decrease in amplitude, over distance, and the rise time would remain constant. This reduction in amplitude could easily be compensated for by applying gain (cranking up the volume) at the receiver. However, as signals propagate along a lossy transmission line, the amplitude of the high-frequency components is reduced, in magnitude, whereas the low-frequency components are unaffected. This selective attenuation of high-frequency components is the root cause of ISI and collapse of the signal eye.

View Story

Beyond Design: FPGA PCB Design Challenges

07-26-2017

The primary issue is generating optimal FPGA pin assignments that do not add vias and signal layers to a PCB stackup or increase the time required to integrate the FPGA with the PCB. Engineers generally do not consider FPGA pin assignments that expedite the PCB layout. Hundreds of logical signals need to be mapped to the physical pin-out of the device, and they must also harmonize with the routing requirements whilst maintaining the electrical integrity of the design.

View Story

Beyond Design: The Dark Side–Return of the Signal

06-21-2017

I guess we all think of a copper plane as a thick, solid plate of copper that can basically handle any amount of current we sink into it. It also serves to make the circuit layout easier, allowing the PCB designer to ground anything, anywhere without having to run multiple tracks. That may well be the case with DC or very low-frequency analog circuits, but certainly not in the case of high-speed design.

View Story

Beyond Design: Return Path Discontinuities

05-29-2017

PCB designers generally take great care to ensure that critical signals are routed exactly to length from the driver to the receiving device pins, but take little care of the return current path of the signal. Current flow is a “round trip” and the critical issue is delay, not length. If it takes one signal longer for the return current to get back to the driver—around a gap in the plane for instance—then there will be skew between the critical timing signals. Return path discontinuities (RPDs) can create large loop areas that increase series inductance, degrade signal integrity and increase crosstalk and electromagnetic radiation.

View Story

Beyond Design: Microstrip Coplanar Waveguides

04-26-2017

The classic coplanar waveguide (CPW) is formed by a microstrip conductor strip separated from a pair of ground planes pours, all on the same layer, affixed to a dielectric medium. In the ideal case, the thickness of the dielectric is infinite. But in practice, it is thick enough so that electromagnetic fields die out before they get out of the substrate. CPWs have been used for many years in RF and microwave design as they reduce radiation loss, at extremely high frequencies, compared to traditional microstrip. And now, as edge rates continue to rise, they are coming back into vogue. This month, I will look at how conformal field theory can be used to model the electromagnetic effects of microstrip coplanar waveguides.

View Story

New Functionality Improves Designer’s Productivity

04-03-2017

I originally came up with the concept of an online impedance calculator way back in 1994 when I was working on the PCB layout and design for a new generation of SPARC 20 servers. We basically reformatted a Sun SPARC 20 pizza box motherboard to fit into a 5.25-inch drive slot.

View Story

Beyond Design: PDN–Decoupling Capacitor Placement

02-24-2017

The impact of lower core voltages and faster edge rates has pushed the frequency content of typical digital signals into the gigahertz range. Consequently, the performance of decoupling capacitors, that are required to complement the power distribution network (PDN) and curb signal induced fluctuations, must also be extended up into this range. However, rudimentary design rules, adequate for frequencies below 100MHz, may not be suitable for today's high-speed digital circuits. The symptoms of an inadequate PDN design are increased power supply noise, crosstalk and electromagnetic radiation leading to poor performance and possibly intermittent operation.

View Story
Back

2016

Beyond Design: Uncommon Sense

12-21-2016

When common sense fails, tap into your uncommon sense. Basically, common sense teaches us that the way it has always been done is the right way, and that’s just how things are. Following common sense is usually the safe way to go. But the people who are really making a difference in the world are usually the people who try something new. Tapping into our uncommon sense allows us to take a look at things we often take for granted.

View Story

Beyond Design: Rock Steady Design

11-09-2016

How do we ensure that our high-speed digital design performs to expectations, is stable given all possible diverse environments, and is reliable over the product’s projected life cycle? For the perfect transfer of energy and to benefit from the highest possible bandwidth, the impedance of the driver must match the impedance of the transmission line and be constant along its entire length.

View Story

The Rise of the Independent Engineer

08-17-2016

With the changing demographics, the old-timers in our industry—the master PCB designers—are about to retire and hand over the exacting job of PCB design to the Gen-X and Ys. These generations, shaped by technology, will tackle the most demanding designs without possessing the experience that we veterans benefit from. And to top it off, these up-and-coming designers will be degreed engineers who have to cope with both design and layout tasks as the specialized PCB designer’s positions are phased out.

View Story

The Case for Artificial Intelligence in EDA Tools

06-29-2016

There has been a lot of activity in the field of artificial intelligence recently, with such developments as voice recognition, unmanned autonomous vehicles and data mining to list a few. But how could AI possibly influence the PCB design process? This month, Barry Olney will take a look at the endless possibilities.

View Story

Beyond Design: The Need for Speed—Strategies for Design Efficiency

05-04-2016

Years of experience with one EDA tool obviously develops efficiency, whether the tool be high-end feature-packed or basic entry-level. And one becomes accustomed to the intricacies of all the good and bad features of their PCB design tool. However, there comes a time, with the fast development pace of technology, that one should really consider a change for the better to incorporate the latest methodologies. This month, I will look at productivity issues that impede the PCB design process.

View Story
Back

2015

Why Autorouters Don’t Work: The Mindset!

12-15-2015

Ask any group of PCB designers what they think of autorouters and the majority will say that they do not use them because they do not work. I have been battling this mindset for over 20 years now and it still persists today, even with the dramatic advances in routing technology. This way of thinking generally comes from those designers who use the entry-level tools that have limited routing capability. But even the most primitive autorouter may have some useful features. It’s all about changing that mindset of the designer and having a crack at it.

View Story

Beyond Design: Stackup Planning, Part 3

09-02-2015

Following on from the first Stackup Planning columns, this month we will look at higher layer-count stackups. The four- and six-layer configurations are not the best choice for high-speed design. In particular, each signal layer should be adjacent to, and closely coupled to, an uninterrupted reference plane, which creates a clear return path and eliminates broadside crosstalk. As the layer count increases, these rules become easier to implement but decisions regarding return current paths become more challenging.

View Story

Beyond Design: Stackup Planning, Part 2

08-12-2015

In Part 1 of the Stackup Planner series, Barry Olney looked at how the stackup is built, the materials used in construction and the lamination process. And he set out some basic rules to follow for high-speed design. It is important keep return paths, crosstalk and EMI in mind during the design process. Part 2 follows on from this with definitions of basic stackups starting with four and six layers. Of course, this methodology can be used for higher layer-count boards—36, 72 layers and beyond.

View Story

Beyond Design: Stackup Planning, Part 1

06-24-2015

The PCB substrate that physically supports the components, links them together via high-speed interconnects and also distributes high-current power to the ICs is the most critical component of the electronics assembly. The PCB is so fundamental that we often forget that it is a component and, like all components, it must be selected based on specifications in order to achieve the best possible performance of the product. Stackup planning involves careful selection of materials and transmission line parameters to avoid impedance discontinuities, unintentional signal coupling and excessive electromagnetic emissions. Barry Olney explains.

View Story

Controlled Impedance Design

06-03-2015

Controlled impedance—it’s all about transmission lines. For perfect transfer of energy, the impedance of the driver must match the transmission line. A good transmission line is one that has constant impedance along the entire length of the line, so that there are no mismatches resulting in reflections. But unfortunately, drivers do not have the exact impedance to match the line (typically 10–35 ohms) so terminations are used to balance the impedance, match the line and minimize reflections.

View Story

Beyond Design: Learning the Curve

05-12-2015

Currently, power integrity is just entering the mainstream market phase of the technology adoption life cycle. The early market is dominated by innovators and visionaries who will pay top dollar for new technology, allowing complex and expensive competitive tools to thrive. However, the mainstream market waits for the technology to be proven before jumping in. Power distribution network (PDN) planning was previously overlooked during the design process, but it is now becoming an essential part of PCB design. But what about the learning curve? The mainstream market demands out-of-the-box, ready-to-use tools.

View Story

Split Planes in Multilayer PCBs

04-08-2015

Creating split planes or isolated islands in the copper planes of multilayer PCBs at first seems like a good idea. Today’s high-speed processors and FPGAs require more than six or seven different high-current power sources. And keeping sensitive analog circuitry isolated from those nasty, fast, digital switching signals seems like a priority in designing a noise-free environment for your product. Or is it?

View Story

Effects of Surface Roughness on High-Speed PCBs

03-11-2015

At frequencies below 1GHz, the effect of copper surface roughness on dielectric loss is negligible. However, as frequency increases, the skin effect drives the current into the surface of the copper, dramatically increasing loss. When the copper surface is rough, the effective conductor length extends as current follows along the contours of the surface up and down with the topography of the copper surface.

View Story
Back

2014

Signal Integrity, Part 2

12-03-2014

In Part 1 of his signal integrity series, Columnist Barry Olney examined how advanced IC fabrication techniques have created havoc with signal quality, and radiated emissions. Part 2 covers the effects of crosstalk, timing, and skew on signal quality.

View Story

Signal Integrity, Part 1 of 3

10-22-2014

As system performance increases, the PCB designer’s challenges become more complex. The impact of lower core voltages, high frequencies, and faster edge rates has forced us into the high-speed digital domain. But in reality, these issues can be overcome by experience and good design techniques. If you don’t currently have the experience, then listen-up.

View Story

Material Selection for Digital Design

08-27-2014

In his latest column, Barry Olney looks at what types of materials are commonly used for digital design, and how to select an adequate material to minimize costs. He advises, "Of course, selecting the best possible material will not hurt, but it may blow out the costs."

View Story

Beyond Design: Concurrent Design

07-30-2014

Concurrent design is the practice of developing products in which the different stages run simultaneously rather than consecutively. It decreases product development time and also time-to-market, leading to improved productivity and reduced costs. The practice is a relatively new process strategy and although the initial implementation can be challenging, the competitive advantage means it is beneficial in the long term.

View Story

Surface Finishes for High-Speed PCBs

06-25-2014

PCB surface finishes vary in type, price, availability, shelf life, assembly process, and reliability. While each treatment has its own merits, electroless nickel immersion gold (ENIG) finish has traditionally been the best fine pitch (flat) surface and lead-free option for SMT boards over recent years. But, unfortunately, nickel is a poor conductor with only one third the conductivity of copper.

View Story

Beyond Design: Transmission Line - From Barbed Wire to High-speed Interconnect

06-04-2014

Contrary to common belief, the transmission line does not carry the signal itself but rather guides electromagnetic energy from one point to another. It is the movement of the electromagnetic field or energy, not voltage or current that transfers the signal. The voltage and current exist in the conductor, but only as a consequence of the field being present as it moves past.

View Story

Mythbusting: There are No One-way Trips!

05-04-2014

One of the greatest myths in PCB design is that we only have to route signal traces from pin-to-pin to make a complete connection. And, that ensuring these traces have matched delay is the only timing issue we need to consider. However, current is not a one way trip--it must complete the circuit back to the source to provide the round-trip current loop.

View Story

Matched Length Does Not Always Equal Matched Delay

04-09-2014

In previous columns, Columnist Barry Olney has discussed matched length routing and how matched length does not necessarily mean matched delay. But, all design rules, specified by chip manufacturers regarding high-speed routing, specify matched length--not matched delay. In this month's column he takes a look at the actual differences between the two.

View Story

Beat the Traffic Jam - Effective Routing of Multiple Loads

03-19-2014

In a previous column, Barry Olney discussed various termination strategies and concluded that a series terminator is best for high-speed transmission lines. But, what if there are a number of loads--how should these transmission lines be routed? For perfect transfer of energy and to eliminate reflections, the impedance of the source must equal the impedance of the trace(s) to the load.

View Story

PDN Planning and Capacitor Selection, Part 2

02-12-2014

In Part 1 of this column, Barry Olney looked closely at how to choose the right capacitor to lower the AC impedance of the power distribution network (PDN) at a particular frequency. This month he continues from there looking at the one-capacitor-value-per-decade and optimized value approaches.

View Story
Back

2013

Beyond Design: Entanglement - The Holy Grail of High-Speed Design

12-18-2013

While high-speed SERDES serial communications seems to currently be at the cutting edge of technology, maybe it will shortly become an antiquated low-speed solution--even speed-of-light fiber optics may become obsolete. This month, Columnist Barry Olney looks at how quantum physics is transforming our world and how it could affect PCB design.

View Story

Beyond Design: Impedance Matching: Terminations

11-26-2013

The impedance of the trace is extremely important, as any mismatch along the transmission path will result in a reduction in signal quality and possibly the radiation of noise. Mismatched impedance causes signals to reflect back and forth along the lines, which causes ringing at the load.

View Story

Material Selection for SERDES Design

11-13-2013

Many challenges face the engineer and PCB designer working with new technologies. For SERDES--high-speed serial links--loss, in the transmission lines, is a major cause of signal integrity issues. Reducing that loss, in its many forms, is not just a matter of reducing jitter, bit error rate (BER) or inter-symbol interference (ISI).

View Story

Beyond Design: Practical Signal Integrity

10-16-2013

"If you are a digital designer, you will eventually have SI problems whether you like it or not. But all is not lost. If you learn to work with these issues, then you will soon become proficient with high-speed design," says columnist Barry Olney.

View Story

Beyond Design: Design for Profit

09-18-2013

Design for profit (DFP) is gaining more recognition as it becomes clear that the cost reduction of printed circuit assemblies cannot be controlled by manufacturing engineers alone. The PCB designer now plays a critical role in cost reduction, says columnist Barry Olney.

View Story

Beyond Design: Skewed Again

08-28-2013

Differential skew has become a performance limiting issue for high-speed SERDES links. The operation of such links involves significant amounts of signal processing to recover clocks, reduce the effects of high-frequency losses, reduce inter symbol interference, and improve signal-to-noise ratio.

View Story

Beyond Design: Losing a Bit of Memory

08-21-2013

No matter what type of memory used in a design, the clock should always have the longest delay. This ensures that the other signals have time to settle before the clock arrives at the device and samples the bus.

View Story

Beyond Design: Electromagnetic Fields, Part 2

07-17-2013

In his last column, Barry Olney discussed how magnetic fields revolve around the earth and how these fields are also present in a multilayer board. Part 2 of "Electromagnetic Fields" will look at how the phenomena influence transmission lines and how they can be applied in a BEM field solver.

View Story

Beyond Design: Electromagnetic Fields, Part 1

06-19-2013

Our whole world literally revolves around electromagnetic fields. Columnist Barry Olney says much insight into high-speed PCB design can be gained by understanding the behavior of transmission lines and the influence of their associated electromagnetic fields.

View Story

Beyond Design: Postmortem Simulation

05-29-2013

Developing the practice of performing a post-mortem analysis on every project facilitates a culture of continuous improvement. This embedded culture of ongoing, positive change is the best way to ensure long-term success according to Barry Olney.

View Story
Back

2012

Beyond Design: Critical Placement

10-17-2012

Controlling the placement of devices limits maximum trace length, reduces flight time delay and skew, and assists in compliance to timing specifications. Maybe some of the advice that follows will help ensure you get it right first time.

View Story

Beyond Design: Mixed Digital-Analog Technologies

09-19-2012

The key to a successful mixed digital-analog design is functional partitioning, understanding the current return path, routing control and management, and using a common ground plane. Barry Olney takes us into the mix this week.

View Story

Beyond Design: Pre-Layout Simulation

08-22-2012

Pre-layout simulation allows a designer to identify and eliminate signal integrity, crosstalk and EMC issues early in the design process. This is the most cost-effective way to design a board. Barry Olney explains why in this case, sooner is better than later.

View Story

Beyond Design: Power Distribution Network Planning

07-18-2012

The power distribution network (PDN) of a multilayer PCB should distribute low noise and stable power to ICs over the entire board area. Ideally, the AC impedance, between power and ground, should be zero, up to the maximum operating frequency for reliable performance.

View Story

Intro to Board-Level Simulation and the PCB Design Process

05-23-2012

Board-level simulation reduces costs by identifying potential problems at the conceptual stage, so that they can easily be avoided, and then catching any further issues during the design process, eliminating the potentially disastrous final-stage changes. By Barry Olney.

View Story

Board-Level Simulation and the Design Process: Plan B - Post-Layout Simulation

05-09-2012

Post-layout simulation covers batch mode simulation, which automatically scans nets on an entire PCB, flagging signal integrity, crosstalk and EMC hot spots. While post-layout simulation can be used for disaster recovery, ideally this process is completed during the design process. Barry Olney explains.

View Story

Beyond Design: A New Slant on Matched-Length Routing

04-04-2012

This month, Barry Olney discusses the traditional serpentine routing for matched length signals and looks at a potentially desirable alternative, the octagonal spiral pattern, that can be especially useful if real estate is at a premium.

View Story

Beyond Design: Controlling the Beast

02-16-2012

In this column, we will tackle the "microstripum crosstalkus radiarta," an insidious little creature more commonly known as microstrip crosstalk radiation. Thriving on the outer layers of PCBs, crosstalk, like fleas on a dog, can't be eliminated completely or forever; the key is learning how to minimize and control it.

View Story
Back

2011

Beyond Design: Embedded Signal Routing

11-03-2011

Is radiation actually attenuated when high-speed signals are routed embedded between the planes? There are specific constraints and factors to consider when assessing just how much attenuation we actually get from embedding the high-speed signals between the planes. Barry Olney breaks it all down.

View Story

Beyond Design: The Dumping Ground

09-14-2011

By definition, a ground plane in a PCB is a layer of copper that appears to most signals as an infinite ground potential. This month, we discuss best practices for selecting reference planes and routing pairs for high-speed designs on multilayer boards.

View Story

Beyond Design: Controlling Emissions and Improving EMC

08-11-2011

Unintended noise can be a formidable enemy, and it is best to totally eliminate, control or attenuate the emissions at the source. Controlling the impedance of the substrate and terminating the transmission line to match the impedance of the respective source and load significantly reduces radiated noise, virtually eliminating the noise at the source.

View Story

PCB Design Techniques for DDR, DDR2 & DDR3, Part 2

07-21-2011

This second and final part in a series examining PCB design techniques will look at a comparison of DDR2 and DDR3, DDR3 design guidelines, pre-layout analysis, critical placement, design rules, and post-layout analysis.

View Story
Copyright © 2018 I-Connect007. All rights reserved.