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Size reduction coupled with increased bandwidth is driving new and tighter PCB/FPC (flexible printed circuit) design requirements that may exceed the capability of fabrication processes used for previous generations of I/O connector interfaces. In short, connector land pattern tolerances drive process requirements not previously needed. An understanding of complex process interactions is necessary to identify processes to use, conduct risk assessment, and meet product quality requirements.
The purpose of iNEMI’s PCB Connector Footprint Tolerance project is to define methods that enable designers who are creating products with high I/O bandwidth connector footprints to use the collected industry capability and capacity data to determine appropriate mitigation for the required level of quality for a given product. This fast-turnaround project will:
- Provide better understanding of risks associated with high I/O bandwidth connector footprints
- Enable product designers to conduct risk assessments to determine optimum manufacturing processes to enable PCB suppliers to meet product quality requirements
- Reduce product qualification costs and associated time to market
Registration
Join us for our call-for-participation webinar to learn more about this new project. Two sessions are scheduled and are open to industry; advance registration is required, visit iNEMI's website.
Session 1
Tuesday, May 9, 2023
11:00 am. — 12:00 p.m. EDT (US)
5:00-6:00 p.m. CEST (Europe)
Session 2
Wednesday, May 10, 2023
7:00-8:00 a.m. CST (China)
7:00-8:00 p.m. EDT (US) on May 9
